Search results for "Electrical Circuits"
showing 10 items of 91 documents
A Novel Fault-Tolerant Routing Algorithm for Mesh-of-Tree Based Network-on-Chips
2019
Use of bus architecture based communication with increasing processing elements in System-on-Chip (SoC) leads to severe degradation of performance and speed of the system. This bottleneck is overcome with the introduction of Network-on-Chips (NoCs). NoCs assist in communication between cores on a single chip using router based packet switching technique. Due to miniaturization, NoCs like every Integrated circuit is prone to different kinds of faults which can be transient, intermittent or permanent. A fault in any one component of such a crucial network can degrade performance leaving other components non-usable. This paper presents a novel Fault-Tolerant routing Algorithm for Mesh-of-Tree …
Contrasting topologies for regular interconnection networks under the constraints of nanoscale silicon technology
2010
Nowadays, system designers have adopted Networks-on-Chip as communication infrastructure of general-purpose tile-based Multi-Processor System-on-Chip (MPSoC). Such decision implies that a certain topology has to be selected to efficiently interconnect many cores on the chip. To ease such a choice, the networking literature offers a plethora of works about topology analysis and characterization for the off-chip domain. However, theoretical parameters and many intuitive assumptions of such off-chip networks do not necessarily hold when a topology is laid out on a 2D silicon surface. This is due to the distinctive features of silicon technology design pitfalls. This work is a first milestone t…
Multi-application Based Network-on-Chip Design for Mesh-of-Tree Topology Using Global Mapping and Reconfigurable Architecture
2019
This paper outlines a multi-application mapping for Mesh-of-Tree (MoT) topology based Network-on-Chip (NoC) design using reconfigurable architecture. A two phase Particle Swarm Optimization (PSO) has been proposed for reconfigurable architecture to minimize the communication cost. In first phase global mapping is done by combining multiple applications and in second phase, reconfiguration is achieved by switching the cores to near by routers using multiplexers. Experimentations have been carried out for several application benchmarks and synthetic applications generated using TGFF tool. The results show significant improvement in terms of communication cost after reconfiguration.
Fault-Tolerant Network-on-Chip Design for Mesh-of-Tree Topology Using Particle Swarm Optimization
2018
As the size of the chip is scaling down the density of Intellectual Property (IP) cores integrated on a chip has been increased rapidly. The communication between these IP cores on a chip is highly challenging. To overcome this issue, Network-on-Chip (NoC) has been proposed to provide an efficient and a scalable communication architecture. In the deep sub-micron level NoCs are prone to faults which can occur in any component of NoC. To build a reliable and robust systems, it is necessary to apply efficient fault-tolerant techniques. In this paper, we present a flexible spare core placement in Mesh-of-Tree (MoT) topology using Particle Swarm Optimization (PSO) by considering IP core failures…
Torus Topology based Fault-Tolerant Network-on-Chip Design with Flexible Spare Core Placement
2018
The increase in the density of the IP cores being fabricated on a chip poses on-chip communication challenges and heat dissipation. To overcome these issues, Network-onChip (NoC) based communication architecture is introduced. In the nanoscale era NoCs are prone to faults which results in performance degradation and un-reliability. Hence efficient fault-tolerant methods are required to make the system reliable in contrast to diverse component failures. This paper presents a flexible spare core placement in torus topology based faulttolerant NoC design. The communications related to the failed core is taken care by selecting the best position for a spare core in the torus network. By conside…
SiC Based Latching Current Limiter for High Voltage Space Power Distribution Systems
2018
This study presents a novel Latching Current Limiter topology, based on a N-channel Silicon Carbide (SiC) MOSFET as the main switching element. The design has been carried out using only discrete components, without digital controllers. This design has been validated by simulation and with a prototype. Tests have been performed at 1000V, modifying the limitation times, current-limiting values and eventually checking the proper operation of the system.
Robust Network Agreement on Logical Information
2011
Abstract Logical consensus is an approach to distributed decision making which is based on the availability of a network of agents with incomplete system knowledge. The method requires the construction of a Boolean map which defines a dynamic system allowing the entire network to consent on a unique, global decision. Previous work by the authors proved the method to be viable for applications such as intrusion detection within a structured environment, when the agent's communication topology is known in advance. The current work aims at providing a fully distributed protocol, requiring no a priori knowledge of each agent's communication neighbors. The protocol allows the construction of a r…
Heat Pump Induction Motor Faults Caused by Soft Starter Topology — Case Study
2021
This paper presents a case study of electrical machine faults, emerging in heat pump systems. In Nordic countries, heat pumps have been gaining popularity during the past years and have become one of the leading ways of heating in households and smaller public buildings. Although not a very complicated setup, the devices used are still prone to unexpected failures, especially if wrongly chosen, installed or maintained. The paper presents a study conducted on five real-life cases with very similar outcomes and failure modes. The setup of the systems is explained, faults are listed and presented, causes of the faults including modeling and measurement data are provided. The suggestions are gi…
Distributed Adaptive Control for Asymptotically Consensus Tracking of Uncertain Nonlinear Systems With Intermittent Actuator Faults and Directed Comm…
2019
In this article, we investigate the output consensus tracking problem for a class of high-order nonlinear systems with unknown parameters, uncertain external disturbances, and intermittent actuator faults. Under the directed topology conditions, a novel distributed adaptive controller is proposed. The common time-varying trajectory is allowed to be totally unknown by part of subsystems. Therefore, the assumption on the linearly parameterized trajectory signal in most literature is no longer needed. To achieve the relaxation, extra distributed parameter estimators are introduced in all subsystems. Besides, to handle the actuator faults occurring at possibly infinite times, a new adaptive com…
Clustering Quality and Topology Preservation in Fast Learning SOMs
2008
The Self-Organizing Map (SOM) is a popular unsupervised neural network able to provide effective clustering and data visualization for data represented in multidimensional input spaces. In this paper, we describe Fast Learning SOM (FLSOM) which adopts a learning algorithm that improves the performance of the standard SOM with respect to the convergence time in the training phase. We show that FLSOM also improves the quality of the map by providing better clustering quality and topology preservation of multidimensional input data. Several tests have been carried out on different multidimensional datasets, which demonstrate better performances of the algorithm in comparison with the original …